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Hardware in the loop co-simulation of finite set-model predictive control using FPGA for a three level CHB inverter
International Journal of Power Electronics and Drive Systems (IJPEDS)
Along with the development of powerful microprocessors and microcontrollers, the applications of the model predictive controller, which requires high computational cost, to fast dynamical systems such as power converters and electric drives have become a tendency recently. In this paper, two solutions are offered to quickly develop the finite set predictive current control for induction motor fed by 3-level H-Bridge cascaded inverter. First, the field programmable gate array (FPGA) withdoi:10.11591/ijpeds.v11.i4.pp1719-1730 fatcat:fcwukx7yfvf65infa5jxgmo4wm