Balanced scheduling

Daniel R. Kerns, Susan J. Eggers
1993 Proceedings of the ACM SIGPLAN 1993 conference on Programming language design and implementation - PLDI '93  
Traditionat list schedulers order itxwructions based on an optimistic estimate of the load delay imposed by the implementation. Therefore they cannot respond to variations in load latencies (due to cache hits or misses, congestion in the memory interconnect, etc.) and cannot easily be applied across different implementations. We have developed an alternative algorithm, known as balanced scheduling, that schedules instructions based on an estimate of the amount of instruction level parallelism
more » ... level parallelism in the program. Since scheduling decisions are program-rather than machine-based, balanced scheduling is unaffected by implementation changes. Since it is based on the amount of instruction level parallelism that a program can support, it can respond better to variations in load latencies. Performance improvements over a traditional list scheduler on a Fortran workload and simulating several different machine types (cache-based workstations, large parallel machines with a multipath interconnect and a combination, atl with non-blocking processors) are quite good, averaging between 3910and 18%.
doi:10.1145/155090.155117 dblp:conf/pldi/KernsE93 fatcat:arxbsbylhvhynotj54xhkgt4cu