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CPU-GPU hybrid bidiagonal reduction with soft error resilience
2013
Proceedings of the Workshop on Latest Advances in Scalable Algorithms for Large-Scale Systems - ScalA '13
Soft errors pose a real challenge to applications running on modern hardware as the feature size becomes smaller and the integration density increases for both the modern processors and the memory chips. Soft errors manifest themselves as bit-flips that alter the user value, and numerical software is a category of software that is sensitive to such data changes. In this paper, we present a design of a bidiagonal reduction algorithm that is resilient to soft errors, and we also describe its
doi:10.1145/2530268.2530270
dblp:conf/sc/JiaLBD13
fatcat:fnzowqdodzhz5bl57mwkeujere