SEU tolerant device, circuit and processor design

William Heidergott
2005 Proceedings of the 42nd annual conference on Design automation - DAC '05  
Development of highly reliable and available systems requires consideration of the occurrence of single event upsets, the effects they have on system performance, and strategies for their prevention and mitigation. Methods of systems engineering process and the application and validation of techniques for fault tolerance are discussed as elements in the elimination and mitigation of single event upsets.
doi:10.1145/1065579.1065586 dblp:conf/dac/Heidergott05 fatcat:2i7pofayvva33m6nleyaw64qfy