Test and evaluation of HAL25: the ALICE SSD front-end chip [article]

C Hu-Guo, G Deptuch, C Colledani, C Gojak, Jean Robert Lutz, D Bonnet, J P Coffin, I Valin, C Claus, J D Berst
2002
HAL25 is a mixed low noise, low power consumption and radiation hardened ASIC intended for the Silicon Strip Detectors (SSD) read out in the ALICE tracker. It is designed in a 0.25 micron CMOS process. It contains 128 analogue channels, consisting each of a preamplifier, a shaper and a storage capacitor. The analogue data is sampled by an external logic signal and then is serially read out through an analogue multiplexer. This voltage signal is converted into a differential current signal by a
more » ... ifferential linearised transconductance output buffer. A slow control mechanism based on the JTAG protocol is implemented for a programmable bias generator, an internal test pulse system and functional modes selection. This paper presents HAL25_V2 measurement results. Features related to new requirements, like the maximum readout frequency and higher input rate, are also discussed.
doi:10.5170/cern-2002-003.135 fatcat:zg2v7zloorctpilzsl2vy6apsm