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In this paper, we introduce an architecture of pre-encoded multipliers for digital signal processing applications based on off-line encoding of coefficients. To this extend, the Non-Redundant radix-4 Signed-Digit (NR4SD) encoding technique, which uses the digit values fÀ1; 0; þ1; þ2g or fÀ2; À1; 0; þ1g, is proposed leading to a multiplier design with less complex partial products implementation. Extensive experimental analysis verifies that the proposed pre-encoded NR4SD multipliers, includingdoi:10.1109/tc.2015.2428691 fatcat:cysnkpfbsrhj7ht2hn2c4l73bu