SUCA: a scalable unicore architecture with novel instruction encoding and distributed execution control

Hu Chen, Shuming Chen, Yaohua Wang, Kai Zhang
2011 IEICE Electronics Express  
The scalability achieved by partitioning of resources among clusters is still limited by traditional instruction encoding and centralized instruction execution control. This paper introduces a scalable unicore clustered architecture (SUCA). The instruction encoding encodes common information of sequences of instructions separately, thus reducing the amount of information in instruction words. The pipeline allows functional units to manage their own execution, thus releasing instruction issuing
more » ... nstruction issuing from instruction scheduling. SUCA can scale to 32 clusters with 1024 registers. Meanwhile, for the 4-cluster configuration, SUCA achieves an average of 13.3% speedup and a 4.6% improvement in frequency with reasonable hardware overhead, as compared with a traditional clustered processor.
doi:10.1587/elex.8.2010 fatcat:5sck67dmp5epdixtavmpvwv3lu