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Journal of Computers
The technological evolution has increased the number of transistors for a given die area significantly and increased the switching speed from few MHz to GHz range. Such inversely proportional decline in size and boost in performance consequently demands shrinking of supply voltage and effective power dissipation in chips with millions of transistors. This has triggered substantial amount of research in power reduction techniques into almost every aspect of the chip and particularly thedoi:10.4304/jcp.4.10.927-942 fatcat:nau6udvp4vd3ffon3zbwmzsgje