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IEEE International Symposium on Circuits and Systems
This paper introduces a new parallel algorithm for digital adaptive filters. The algorithm is a look-ahead realization of a transversal filter, where a forgetting factor is employed to diminish the effect of the past errors in the performance index. We have illustrated how such algorithm can be implemented in a regular and modular structure, suitable for VLSI implementation. The maximum sampling rate is limited by time of adding two binary inputs. If the input signal has the sampling rate lowerdoi:10.1109/iscas.1989.100793 fatcat:rq6x52yxanfalign2tv24fiiba