Digest of Papers. 2005 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, 2005.
In this paper, a frequency doubler circuit is presented that converts a 0.6 GHz signal to a 1.2 GHz output using standard CMOS 0.18 µm technology. The proposed circuit uses a time-delay element and an XOR logic gate to perform the frequency multiplication and is implemented entirely on-chip. Advantages of this topology include good fundamental suppression, compact layout, and low power consumption. Experimental results show a relatively constant output power of approximately 4 dBm with an inputdoi:10.1109/smic.2005.1587925 fatcat:akehrlmlcbfm7dh44mtmil66dm