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Area-efficient instruction set synthesis for reconfigurable system-on-chip designs
2004
Proceedings of the 41st annual conference on Design automation - DAC '04
Silicon compilers are often used in conjunction with Field Programmable Gate Arrays (FPGAs) to deliver flexibility, fast prototyping, and accelerated time-to-market. Many of these compilers produce hardware that is larger than necessary, as they do not allow instructions to share hardware resources. This study presents an efficient heuristic which transforms a set of custom instructions into a single hardware datapath on which they can execute. Our approach is based on the classic problems of
doi:10.1145/996566.996679
dblp:conf/dac/BriskKS04
fatcat:bvt4czqnsncudgog26zhvtm66q