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An 18-GHz continuous-time Σ-Δ analog-digital converter implemented in InP-transferred substrate HBT technology
2001
IEEE Journal of Solid-State Circuits
We report an 18-GHz clock-rate second-order continuous-time 6-1 analog-digital converter (ADC) implemented using InP-transferred substrate HBTs. Under two-tone test conditions, the ADC achieved 43 dB and 33 dB SNR at signal frequencies of 500 MHz and 990 MHz, respectively. The IC occupied 1.95 mm 2 die area and dissipated 1.5 W. Index Terms-ADC, delta-sigma, heterojunction bipolar transistor, substrate transfer. I. INTRODUCTION H IGH speed analog-to-digital converters (ADCs) find widespread
doi:10.1109/4.944661
fatcat:m3ozfv4erbcp7l2utlyprmkwne