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Automatic refinement checking for formal system models
2014
Proceedings of the 2014 Forum on Specification and Design Languages (FDL)
For the design of complex systems, formal modeling languages such as UML or SysML find significant attention. The typical model-driven design flow assumes thereby an initial (abstract) model which is iteratively refined to a more precise description. During this process, new errors and inconsistencies might be introduced. In this paper, we propose an automatic method for verifying the consistency of refinements in UML or SysML. For this purpose, a theoretical foundation is considered from which
doi:10.1109/fdl.2014.7119339
dblp:conf/fdl/SeiterWKD14
fatcat:yhqwhi3v65hx5nwf5sp7x3nbvi