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Application specific instruction memory transformations for power efficient, fault resilient embedded processors
IEEE International SOC Conference, 2004. Proceedings.
In this paper we present a coding framework for a low energy instruction bur for embedded pracerras. The encoder exploits application-specific hawledge regarding program Iwl-spots to generate codewords that deliver savings in power and to funhermore provide c o n c m n t detection of ~LTOK. Power ravings can be obtained through the use of codewards h a t reduce the switching activity on the bus. The analysis shows that generating codewards that prohibit the occ~rrence of thrce consecutive
doi:10.1109/socc.2004.1362405
dblp:conf/socc/AyoubPO04
fatcat:r4y4dwhdnjhnlga45xk5tvlvke