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VLSI design (Print)
This paper presents a new test approach that is suitable for repetitive structures such as cellular arrays. As such, it is directly applicable to most arithmetic circuits which are generally quite regular. It is based on exhaustive testing of overlapping segments of the array. This approach detects bridging faults in addition to stuck-at faults. Such bridging faults are a significant problem in arithmetic circuits. The ability to detect arbitrary faults involving any cells within a designerdoi:10.1155/1993/76586 fatcat:zswn5ilxsjeibldh5u6b2t2jx4