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Energy-efficient fault tolerance in chip multiprocessors using Critical Value Forwarding
2010 IEEE/IFIP International Conference on Dependable Systems & Networks (DSN)
Relentless CMOS scaling coupled with lower design toler ances is making ICs increasingly susceptible to wear-out re lated permanent faults and transient faults, necessitating on-chip fault tolerance in future chip microprocessors (CMPs). In this paper we introduce a new energy-efficient fault-tolerant CMP architecture known as Redundant Execution using Critical Value Forwarding (RECVF). RECVF is based on two observations: (i) forwarding critical instruction results from the leading to thedoi:10.1109/dsn.2010.5544918 dblp:conf/dsn/SubramanyanSSL10 fatcat:7n7tkv6jvzb77f7kwzgrtpq6ve