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Characterization of Asynchronous Templates for Integration into Clocked CAD Flows
2009
2009 15th IEEE Symposium on Asynchronous Circuits and Systems
Asynchronous circuit design can result in substantial benefits of reduced power, improved performance, and high modularity. However, asynchronous design styles are largely incompatible with clocked CAD, which has prevented wide-scale adoption. The key incompatibility is timing. Thus most commercial work relies on custom CAD or untimed delay-insensitive design methodologies. This paper proposes a new methodology, based on formal verification and relative timing, to create and prove correct
doi:10.1109/async.2009.26
dblp:conf/async/StevensXV09
fatcat:suslhojq5nd3xh3zjx3bq7krga