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Computer architects usually evaluate new designs by cycleaccurate processor simulation. This approach provides detailed insight into processor performance, power consumption and complexity. However, only configurations in a subspace can be simulated in practice due to long simulation time and limited resource, leading to suboptimal conclusions which might not be applied in a larger design space. In this paper, we propose an automated performance prediction approach which employsdoi:10.1145/1375457.1375510 dblp:conf/sigmetrics/LiPR08 fatcat:li5escsi3bbldgjvrhqpjzdpxe