A methodology for rapid prototyping of analog systems

S. Ganesan, R. Vemuri
Proceedings 1999 IEEE International Conference on Computer Design: VLSI in Computers and Processors (Cat. No.99CB37040)  
In this paper, we present a methodology for rapid prototyping of linear time-invariant analog systems. The prototyping hardware is composed of field-programmable analog arrays (FPAAs) to enable rapid evaluation and validation of analog designs. Starting with a signal flow graph description of the system, a library-based technology mapping phase produces FPAA designs optimized for area. The technology mapper then explores the design space by performing gain distribution. Technology mapping is
more » ... ology mapping is followed by the placement and routing phase that generates the physical layout on the target single-segment array-based FPAA architecture. We employ an integrated place and route approach in order to guarantee routability and performance.
doi:10.1109/iccd.1999.808584 dblp:conf/iccd/GanesanV99 fatcat:yc2gorbv4bdobpeg3z46ngygti