A redundant binary Euclidean GCD algorithm

S.N. Parikh, D.W. Matula
[1991] Proceedings 10th IEEE Symposium on Computer Arithmetic  
A n efficient implementation of the Euclidean gcd algorithm employing the redundant binary number system is described. The time complexity is O(n) utilizing O(n) 4-2 signed 1-bit adders to determine the gcd of two n-bit integers. The process is similar to that employed in SRT division. The efficiency of the algorithm is competitive, t o within a small factor, with floating point division an terms of the number of shifi and add/subtract operations. The novelty of our algorithm is based on
more » ... ies derived from our scheme of normalization of signed bit fractions. Our implementation is noted t o be well suited t o systolic hardware design. 220 CH3015-5/91/0000/0220$01 .OO 0 1991 IEEE
doi:10.1109/arith.1991.145563 dblp:conf/arith/ParikhM91 fatcat:7ghogf3zqnh4hjmzof3wudjvgq