Design and Analysis of Ultra Low Power True Single Phase Clock CMOS 2/3 Prescaler

M.V. Krishna, Manh Anh Do, Kiat Seng Yeo, Chirn Chye Boon, Wei Meng Lim
2010 IEEE Transactions on Circuits and Systems Part 1: Regular Papers  
doi:10.1109/tcsi.2009.2016183 fatcat:kuz5hukydjbflmvqd6bhlbtbey