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A Coarse-Grained Reconfigurable Architecture (CGRA) is a processing platform which constitutes an interconnection of coarse-grained computation units. CGRAs are a well-researched topic and the design space of a CGRA is quite large. A typical CGRA requires many processing elements and a configuration cache for reconfiguration of its processing element array. However, such a structure consumes significant area and power. Therefore, designing cost-effective CGRA has been a serious concern fordoi:10.22214/ijraset.2018.4596 fatcat:6q4jpnj2e5emhgf2m57pfszrti