A systolic processor for signal processing

G. A. Frank, E. M. Greenawalt, A. V. Kulkarni
1982 Proceedings of the June 7-10, 1982, national computer conference on - AFIPS '82  
A systolic array is a natural architecture for a high-performance signal processor, in part because of the extensive use of inner-product operations in signal processing. The modularity and simple interconnection of systolic arrays promise to simplify the development of cost-effective, high-performance, special-purpose processors. ESL Incorporated has built a proof of concept model of a systolic processor. It is flexible enough to permit experimentation with a variety of algorithms and
more » ... ons. ESL is exploring the application of systolic processors t6 image-and signalprocessing problems. This paper describes this experimental system and some of its applications to signal processing. ESL is also pursuing new types of systolic architectures, including the VLSI implementation of systolic cells for solving systems of linear equations. These new systolic architectures allow the real-time design of adaptive filters.
doi:10.1145/1500774.1500801 dblp:conf/afips/FrankGK82 fatcat:dlcqjockobhcdoyg4vwkeb7puu