A Fabrication Process for Emerging Nanoelectronic Devices Based on Oxide Tunnel Junctions

Dominique Drouin, Gabriel Droulers, Marina Labalette, Bruno Lee Sang, Patrick Harvey-Collard, Abdelkader Souifi, Simon Jeannot, Stephane Monfray, Michel Pioro-Ladriere, Serge Ecoffey
2017 Journal of Nanomaterials  
We present a versatile nanodamascene process for the realization of low-power nanoelectronic devices with different oxide junctions. With this process we have fabricated metal/insulator/metal junctions, metallic single electron transistors, silicon tunnel field effect transistors, and planar resistive memories. These devices do exploit one or two nanometric-scale tunnel oxide junctions based on TiO2, SiO2, HfO2, Al2O3, or a combination of those. Because the nanodamascene technology involves
more » ... nology involves processing temperatures lower than 300°C, this technology is fully compatible with CMOS back-end-of-line and is used for monolithic 3D integration.
doi:10.1155/2017/8613571 fatcat:pqchi5i73rff7oxm2f4mml6izq