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Inherent Limitations of Hybrid Transactional Memory
[article]
2015
arXiv
pre-print
Several Hybrid Transactional Memory (HyTM) schemes have recently been proposed to complement the fast, but best-effort, nature of Hardware Transactional Memory (HTM) with a slow, reliable software backup. However, the fundamental limitations of building a HyTM with nontrivial concurrency between hardware and software transactions are still not well understood. In this paper, we propose a general model for HyTM implementations, which captures the ability of hardware transactions to buffer memory
arXiv:1405.5689v3
fatcat:stdkilpqmfhg3gi4zxog4wqeh4