A fast fault simulation algorithm for combinational circuits

Wuudiann Ke, S. Seth, B.B. Bhattacharya
[1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers  
The performance of a fast fault simulation algorithm for combinational circuits, such as the critical path tracing method, is determined primarily by the efficiency with which it can deduce the detectability of stem faults (stem analysis). We propose a graph based approach to perform stem analysis. A dynamic data structure, called the criticality constraint graph, is used during the backward pass to carry information related to self masking and multiple-path sensitization of stem faults. The
more » ... stem faults. The structure is updated in such a way that when stems are reached their criticality can be found by looking at the criticality constraints on their fanout branches. Compared to the critical path tracing method, our algorithm is exact and does not require forward propagation of individual stem faults. Several examplca are given to illustrate the power of the algorithm. Preliminary data on an implement& tion is also provided.
doi:10.1109/iccad.1988.122486 dblp:conf/iccad/KeSB88 fatcat:pzy7sd3pmvbp3l5x4dogfq4amy