Ultra-Low Power Sub-Threshold Nanoscale CMOS Path Planning Cores [article]

Ryan Wu, University Of Calgary, University Of Calgary, Sebastian Magierowski, Jim Haslett
This project aims to develop a specialized processor that is optimized for power and algorithm efficiency. The optimization would be targeted for a path-planning algorithm for micro- robots such as insect-bots, UAVs (unmanned aerial vehicles) and for nano-medicine. This processor would provide a computation platform that is smaller, lighter and more power efficient than conventional general-purpose processors to allow these micro-bots to reach a high level of intelligence. These micro-bots
more » ... then be able to navigate themselves to their destination, and perform simple tasks and data processing. To achieve this goal, the processor was designed using a custom computing architecture implemented in RTL, then synthesized and detailed designed to layouts that are then fabri- cated into a physical processor. The processor design target was to operate at 100kHz, while consuming only tens of microwatts and weighing only milligrams.
doi:10.11575/prism/28545 fatcat:zvynr2koyjal3bikt3o3toqbaa