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High-performance computing increasingly makes use of heterogeneous many-core parallelism. Individual processor cores within such systems are radically simpler than their predecessors; and tasks previously the responsibility of hardware, are delegated to software. Rather than use a cache, fast on-chip memory, is exposed through a handful of address space annotations; associating pointers with discrete sections of memory, within trivially distinct programming languages. Our work aims to improvedoi:10.15439/2017f217 dblp:conf/fedcsis/GozillonK17 fatcat:bz7rvbshqzdqhay5dmjzy6slpm