A Novel High-Performance Low-Cost Double-Upset Tolerant Latch Design

Jianwei Jiang, Wenyi Zhu, Jun Xiao, Shichang Zou
2018 Electronics  
Single event double upsets (SEDUs) caused by charge sharing have been an important contributor to the soft error in integrated circuits. Most of the up-to-date double-upset (DU) tolerant latches suffer from high costs in terms of delay, power and area. In this paper, we propose a novel high-performance low-cost double-upset tolerant (HLDUT) latch. Simulation waveforms have validated the double-upset tolerance of the proposed latch. Besides, detailed comparisons demonstrate that our design saves
more » ... 805.24% delay-power-area product (DPAP) on average compared with other considered up-to-date double-upset tolerant latches, which means the proposed latch is a promising candidate for future highly reliable low-cost applications.
doi:10.3390/electronics7100247 fatcat:xcar2cpq5naw3fcrjz4gbnbfse