This paper presents a new formula for the sensitivity of a vertically matched CMOS sense amplifier, of the type used in DRAMs, to threshold voltage mismatch, parasitic capacitance mismatch, transconductance mismatch and bitline load capacitance mismatch. The perturbation approach used in the derivation is novel b d rigorous and yields an explicit closed form solution. The formula agrees well with simulations. It is inherently slightly conservative and thus appropriate for use in design.