Ebrahim M. Songhori, Shaza Zeitouni, Ghada Dessouky, Thomas Schneider, Ahmad-Reza Sadeghi, Farinaz Koushanfar
2016 Proceedings of the 53rd Annual Design Automation Conference on - DAC '16  
We present GarbledCPU, the first framework that realizes a hardware-based general purpose sequential processor for secure computation. Our MIPS-based implementation enables development of applications (functions) in a high-level language while performing secure function evaluation (SFE) using Yao's garbled circuit protocol in hardware. Garbled-CPU provides three degrees of freedom for SFE which allow leveraging the trade-off between privacy and performance: public functions, private functions,
more » ... private functions, and semi-private functions. We synthesize GarbledCPU on a Virtex-7 FPGA as a proof-of-concept implementation and evaluate it on various benchmarks including Hamming distance, private set intersection and AES. Our results indicate that our pipelined hardware framework outperforms the fastest available software implementation.
doi:10.1145/2897937.2898027 dblp:conf/dac/SonghoriZD0SK16 fatcat:zsv5ngejk5fhflu6qkbnifspoq