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A process calculus approach to correctness enforcement of PLCs (full version)
[article]
2020
arXiv
pre-print
We define a simple process calculus, based on Hennessy and Regan's Timed Process Language, for specifying networks of communicating programmable logic controllers (PLCs) enriched with monitors enforcing specifications compliance. We define a synthesis algorithm that given an uncorrupted PLC returns a monitor that enforces the correctness of the PLC, even when injected with malware that may forge/drop actuator commands and inter-controller communications. Then, we strengthen the capabilities of
arXiv:2007.09399v2
fatcat:cbqlxkngfnbn7oq6n32ojxagoe