A Collision Detection Chip on Reconfigurable Hardware

Nuzhet Atay
2005
Collision detection algorithms check the intersection between two given surfaces or volumes. They are computationally-intensive and the capabilities of conventional processors limit their performance. Hardware acceleration of these algorithms can greatly benefit the systems that need collision detection to be performed in real-time. A Field Programmable Gate Array (FPGA) is a great platform to achieve such acceleration. An FPGA is a collection of digital gates which can be reprogrammed at run
more » ... programmed at run time, i.e., it can be used as a CPU that reconfigures itself for a given task. In this paper, we present an FPGA based collision detection chip. The chip can be used as a co-processor for a traditional computer or several of them can be utilized to work in parallel to create a very fast collision detection server for real time environments. In our experiments we have seen speeds-up of 36 with respect to a fast Pentium 4 chip. Further improvements are possible by using more advanced collision detection techniques ... Read complete abstract on page 2. Complete Abstract: Collision detection algorithms check the intersection between two given surfaces or volumes. They are computationally-intensive and the capabilities of conventional processors limit their performance. Hardware acceleration of these algorithms can greatly benefit the systems that need collision detection to be performed in real-time. A Field Programmable Gate Array (FPGA) is a great platform to achieve such acceleration. An FPGA is a collection of digital gates which can be reprogrammed at run time, i.e., it can be used as a CPU that reconfigures itself for a given task. In this paper, we present an FPGA based collision detection chip. The chip can be used as a co-processor for a traditional computer or several of them can be utilized to work in parallel to create a very fast collision detection server for real time environments. In our experiments we have seen speeds-up of 36 with respect to a fast Pentium 4 chip. Further improvements are possible by using more advanced collision detection techniques Abstract: Collision detection algorithms check the intersection between two given surfaces or volumes. They are computationally-intensive and the capabilities of conventional processors limit their performance. Hardware acceleration of these algorithms can greatly benefit the systems that need collision detection to be performed in real-time. A Field Programmable Gate Array (FPGA) is a great platform to achieve such acceleration. An FPGA is a collection of digital gates which can be reprogrammed at run time, i.e., it can be used as a CPU that reconfigures itself for a given task. In this paper, we present an FPGA based collision detection chip. The chip can be used as a co-processor for a traditional computer or several of them can be utilized to work in parallel to create a very fast collision detection server for real time environments. In our experiments we have seen speeds-up of 36 with respect to a fast Pentium 4 chip. Further improvements are possible by using more advanced collision detection techniques. Abstract Collision detection algorithms check the intersection between two given surfaces or volumes. They are computationallyintensive and the capabilities of conventional processors limit their performance. Hardware acceleration of these algorithms can greatly benefit the systems that need collision detection to be performed in real-time. A Field Programmable Gate Array (FPGA) is a great platform to achieve such acceleration. An FPGA is a collection of digital gates which can be reprogrammed at run time, i.e., it can be used as a CPU that reconfigures itself for a given task. In this paper, we present an FPGA based collision detection chip. The chip can be used as a co-processor for a traditional computer or several of them can be utilized to work in parallel to create a very fast collision detection server for real time environments. In our experiments we have seen speeds-up of 36 with respect to a fast Pentium 4 chip. Further improvements are possible by using more advanced collision detection techniques.
doi:10.7936/k7b56h3w fatcat:prompdlacbh7zm7kbvadofdgaq