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A TI-ADC is a circuitry to achieve high sampling rates by passing the signal and its shifted versions through a number of parallel ADCs with lower sampling rates. When the time shifts between the C channels of a TI-ADC are properly tuned, the aggregate of the obtained samples is equivalent to that of a single ADC with C-times the sampling rate. However, the performance of a TI-ADC can be seriously degraded under interchannel timing mismatch. As this nonideality cannot be avoided in practice, wedoi:10.1109/eusipco.2015.7362612 dblp:conf/eusipco/AraghiAA15 fatcat:p4ii3bfe6nhlnav4ngwym2ovjm