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In this paper, we propose a technique that uses an additional mini cache, the L0-Cache, located between the instruction cache I-Cache and the CPU core. This mechanism can provide the instruction stream to the data path and, when managed properly, it can e ectively eliminate the need for high utilization of the more expensive I-Cache. In this work, we propose, implement, and evaluate a series of run-time techniques for dynamic analysis of the program instruction access behavior, which are thendoi:10.1145/313817.313856 dblp:conf/islped/BellasHP99 fatcat:pnq4hnsnizgfbn4gw37o5c3cey