Instruction scheduling for VLIW processors under variation scenario

Nayan V. Mujadiya
2009 2009 International Symposium on Systems, Architectures, Modeling, and Simulation  
In Very Long Instruction Word (VLIW) processors, based on the available instruction-level parallelism in programs, compilers schedule operations onto different functional units. By assuming all the functional units of same kind and having the same latency, the conventional list-scheduling algorithm selects the first available (free) functional unit to schedule an operation. But, in advanced process technologies due to process variation, functional units of same kind may have different
more » ... In such situation, conventional scheduling algorithms may not yield good performance. Process variations in components like adders, multipliers, etc., of different Integer Functional Units (IFUs) in VLIW processors may cause these units to operate at different speeds, resulting in non-uniform latency IFUs. Pessimistic/conservative techniques dealing with the non-uniform latency IFUs may incur significant performance and/or leakage energy loss. In this work, We propose three process variation-aware compile-time techniques to handle non-uniform latency IFUs. In the first technique, namely 'turnoff', we turn off all the process variation affected high latency IFUs. In the second technique, namely 'on-demand turn-on', we use some of the process variation affected high latency IFUs by turning them on whenever there is a requirement. Our experimental results show that with these techniques, the non-uniform latency IFU can be tackled without much performance penalty. The proposed techniques also achieve significant reduction in leakage energy consumption as some of the IFUs are turned off. In variation affected situation, conventional scheduling algorithms may not yield good performance. We propose third technique, namely 'mobility-list-scheduling' algorithm to schedule operations on non-uniform latency functional units and compare our algorithm with the conventional list-scheduling algorithm. Acknowledgments I would like to thank all people who have helped and inspired me during my master study. I especially want to thank my advisor, Dr. Madhu Mutyam, for his guidance during my research and study at IIIT-H. His perpetual energy and enthusiasm in research had motivated all his advisees, including me. In addition, he was always accessible and willing to help his students with their research. I want to thank him also for taking time to read our lengthy e-mails, inspite of his busy schedule at IIT-M. He used to take great care to proof read my research papers. As a result, research life became smooth and rewarding for me.
doi:10.1109/icsamos.2009.5289239 dblp:conf/samos/Mujadiya09 fatcat:ufevv3cs5beixbqvvj647juybe