Equivalence Checking Using Trace Partitioning

Rajdeep Mukherjee, Daniel Kroening, Tom Melham, Mandayam Srivas
2015 2015 IEEE Computer Society Annual Symposium on VLSI  
One application of equivalence checking is to establish correspondence between a high-level, abstract design and a low-level implementation. We propose a new partitioning technique for the case in which the two designs are substantially different and traditional equivalence-point insertion fails. The partitioning is performed in tandem in both models, exploiting the structure present in the high-level model. The approach generates many but tractable SAT/SMT queries. We present experimental data
more » ... quantifying the benefit of our partitioning method for both combinational and sequential equivalence checking of difficult arithmetic circuits and control-intensive circuits.
doi:10.1109/isvlsi.2015.110 dblp:conf/isvlsi/MukherjeeKMS15 fatcat:vexrgnkqsvg7fpj47nomdbvgom