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State retention flip flop architectures with different tradeoffs using crystalline indium gallium zinc oxide transistors implemented in a 32-bit normally-off microprocessor

Niclas Sjökvist, Takuro Ohmaru, Atsuo Isobe, Naoaki Tsutsui, Hikaru Tamura, Wataru Uesugi, Takahiko Ishizu, Tatsuya Onuki, Kazuaki Ohshima, Takanori Matsuzaki, Hidetoshi Mimura, Atsushi Hirose (+9 others)
2014 Japanese Journal of Applied Physics  

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doi:10.7567/jjap.53.04ee10 fatcat:bsl62ylgsvdv5d7atjq4lraps4
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Niclas Sjökvist, Takuro Ohmaru, Atsuo Isobe, Naoaki Tsutsui, Hikaru Tamura, Wataru Uesugi, Takahiko Ishizu, Tatsuya Onuki, Kazuaki Ohshima, Takanori Matsuzaki, Hidetoshi Mimura, Atsushi Hirose, Yasutaka Suzuki, Yoshinori Ieda, Tomoaki Atsumi, Yutaka Shionoiri, Kiyoshi Kato, Gensuke Goto, Jun Koyama, Masahiro Fujita, Shunpei Yamazaki. "State retention flip flop architectures with different tradeoffs using crystalline indium gallium zinc oxide transistors implemented in a 32-bit normally-off microprocessor." Japanese Journal of Applied Physics 53.4S (2014) 04EE10