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This paper presents some recent advances in the architecture for the data compression technique known as Arithmetic Coding. The new architecture employs loop unrolling and speculative execution of the inner loop of the algorithm to achieve a significant speed-up relative to the Q-Coder architecture. This approach reduces the number of iterations required to compress a block of data by a factor that is on the order of the compression ratio. While the speed-up technique has been previouslydoi:10.1109/dcc.1994.305933 dblp:conf/dcc/FeyginGC94 fatcat:ccazzyhplvcodmhn7d7rezhzhe