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Third order CMOS decimator design for sigma delta modulators [thesis]

Hemalatha Mekala

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A third order Cascaded Integrated Comb (CIC) filter has been designed in 0.5µm n-well CMOS process to interface with a second order oversampling sigma-delta ADC modulator. The modulator was designed earlier in 0.5µm technology. The CIC filter is designed to operate with 0 to 5V supply voltages. The modulator is operated with ±2.5V supply voltage and a fixed oversampling ratio of 64. The CIC filter designed includes integrator, differentiator blocks and a dedicated clock divider circuit, which
more » ... vides the input clock by 64. The CIC filter is designed to work with an ADC that operates at a maximum oversampling clock frequency of up to 25 MHz and with baseband signal bandwidth of up to 800 kHz. The design and performance of the CIC filter fabricated has been discussed.
doi:10.31390/gradschool_theses.858 fatcat:ybvknqyw4jhnnnq2o7k3rglat4
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Hemalatha Mekala. "Third order CMOS decimator design for sigma delta modulators."