This paper, in line with modern telecommunication development, investigates controlled-oscillator design and simulation, i.e. central nuclear of telecommunication systems synthesis. In this paper, useful frequency oscillations required by controlled oscillator are designed and provided via voltage applying consisting tune control, reactor diode and digital words, and efficient results were obtained. Designing and simulation of oscillator using negative resistance with self, capacitor and

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... rs as capacitor tank of inductor to cause positive feedback and oscillation volatility. In order to make negative resistance from active elements i.e. transistors, due to lower occupation and applicability on low power ICs. Required negative resistance simulated by pairing cross transistors. Capacitor bank including transistor capacitor (Gate source) oscillators where designed and simulated in 0.180 um size with CMOS technology by ADS software. The results are summarized in a table so that designed merit value is199dBc/Hz and indicating the design quality. The obtained phase noise from simulation of voltage-oscillator with voltage equals 146dBc/Hz and indicating the frequency spectrum purity. Central frequency of the 2.42 GHz and the offset of calculation and criterion formula merit is 1 MHz. power consumption is below 3 mv.