Review on Design Simulation of a Modified ALU Using QLUT

Ms. Shreya V. Vaidya
2018 International Journal for Research in Applied Science and Engineering Technology  
In VLSI interconnections are main contributor to delay, energy consumption and area Multiple-valued logic (MVL) allows the reduction of the required number of signals in the circuit, so can be effectively used to reduce the impact of interconnections. In this paper we propose an modified ALU which uses a quaternary logic look up table. The ALU is compatible with standard CMOS processes. The ALU is designed And Simulated Using TANNER. Schematics are designed using S-spice and simulated in
more » ... simulated in T-spice. Keywords: Multiple valued logic (MVL), Quaternary logic look up table (QLUT), TANNER, Arithmetic logic unit (ALU) I.
doi:10.22214/ijraset.2018.4456 fatcat:2lsifqlip5cf5bkvfyu34mloyy