A Prototype Multithreaded Associative SIMD Processor

Kevin Schaffer, Robert A. Walker
2007 2007 IEEE International Parallel and Distributed Processing Symposium  
The performance of SIMD processors is often limited by the time it takes to transfer data between the centralized control unit and the parallel processor array. This is especially true of hybrid SIMD models, such as associative computing, that make extensive use of global search operations. Pipelining instruction broadcast can help, but is not enough to solve the problem, especially for massively parallel processors with thousands of processing elements. In this paper, we describe a SIMD
more » ... or architecture that combines a fully pipelined broadcast/reduction network with hardware multithreading to reduce performance degradation as the number of processors is scaled up.
doi:10.1109/ipdps.2007.370471 dblp:conf/ipps/SchafferW07 fatcat:4jpenxo2cfffrb5t4wk4aikc6i