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With the increase in the density and performance of digital electronics, the demand for a power-efficient high-performance computing (HPC) system has been increased for embedded applications. The existing embedded HPC systems suffer from issues like programmability, scalability, and portability. Therefore, a parameterizable and programmable high-performance processor system architecture is required to execute the embedded HPC applications. In this work, we proposed an embedded multi vector-coredoi:10.1016/j.sysarc.2018.04.002 fatcat:44lbldctjnekjpfwrnmicmkhc4