Hybrid CMOS/memristor circuits

D. B. Strukov, D. R. Stewart, J. Borghetti, X. Li, M. Pickett, G. Medeiros Ribeiro, W. Robinett, G. Snider, J. P. Strachan, W. Wu, Q. Xia, J. Joshua Yang (+1 others)
<span title="">2010</span> <i title="IEEE"> <a target="_blank" rel="noopener" href="https://fatcat.wiki/container/kucxvipvevedfgtsl3pnvxorse" style="color: black;">Proceedings of 2010 IEEE International Symposium on Circuits and Systems</a> </i> &nbsp;
This is a brief review of recent work on the prospective hybrid CMOS/memristor circuits. Such hybrids combine the flexibility, reliability and high functionality of the CMOS subsystem with very high density of nanoscale thin film resistance switching devices operating on different physical principles. Simulation and initial experimental results demonstrate that performance of CMOS/memristor circuits for several important applications is well beyond scaling limits of conventional VLSI paradigm. I.
<span class="external-identifiers"> <a target="_blank" rel="external noopener noreferrer" href="https://doi.org/10.1109/iscas.2010.5537020">doi:10.1109/iscas.2010.5537020</a> <a target="_blank" rel="external noopener" href="https://dblp.org/rec/conf/iscas/StrukovSBLPMRSSWXYW10.html">dblp:conf/iscas/StrukovSBLPMRSSWXYW10</a> <a target="_blank" rel="external noopener" href="https://fatcat.wiki/release/nuoyshjdsrge7o7mgxiffs2dvq">fatcat:nuoyshjdsrge7o7mgxiffs2dvq</a> </span>
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