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Memory-aware NoC design methodology In the past decade, tremendous progress has been made in NoC research, spanning architectures, protocols and tools. In addition to a large number of academic and research projects, we are now seeing several commercial realizations of NoCbased chip designs. With chip capacities going well beyond the billion transistor mark, on one hand large amounts of the die are occupied by memory resources and on the other hand many complex applications being mapped todoi:10.1109/date.2008.4484829 dblp:conf/date/Dutt08 fatcat:zhmp7mdfhnfifbqh73lpqzmlxa