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This paper presents the design and implementation of an image processing system which is based on the NIOS II softcore embedded processor of Altera. The proposed system which has an open architecture, stands as a useful and flexible platform for the implementation and testing of customized image processing algorithms in hardware. This system is implemented on the FPGA (Field Programmable Gate Array) of the Altera's DE2-70 development platform utilizing the features of Quartus II SoPC (System ondoi:10.25103/jestr.095.06 fatcat:qhwcsfkgxjhwdppmvoledcvu4i