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Embedded processors are required to achieve high performance while running on batteries. Thus, they must exploit all the possible means available to reduce energy consumption while not sacrificing performance. In this work, one technique to reduce energy is explored to intelligently design the instructionopcodes of a processor based on a target-workload. The optimization is done using a heuristic that not-only minimizes switching between adjacent instructions, but also simplifies the decodingdoi:10.1109/iccd.2008.4751918 dblp:conf/iccd/IyerPC08 fatcat:qhdqdvtn2rhxjk4s3c5c5rp3ke