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Using estimates from behavioral synthesis tools in compiler-directed design space exploration
2003
Proceedings of the 40th conference on Design automation - DAC '03
This paper considers the role of performance and area estimates from behavioral synthesis in design space exploration. We have developed a compilation system that automatically maps high-level algorithms written in C to applicationspecific designs for Field Programmable Gate Arrays (FP-GAs), through a collaboration between parallelizing compiler technology and high-level synthesis tools. Using several code transformations, the compiler optimizes a design to increase parallelism and utilization
doi:10.1145/775832.775963
dblp:conf/dac/SoDH03
fatcat:fp2qmdpqsjfylkkwzemjjesebu