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The rising core count per processor is pushing chip complexity to a level that hardware-based cache coherency protocols become too hard and costly to scale someday. We need new designs of many-core hardware and software other than traditional technologies to keep up with the ever-increasing scalability demands. A cluster-on-chip architecture, as exemplified by the Intel Single-chip Cloud Computer (SCC), promotes a software-oriented approach instead of hardware support to implementing shareddoi:10.1109/padsw.2014.7097807 dblp:conf/icpads/LamSHWLZY14 fatcat:sadkzvqywjepzenwnp32nr65fi